RBC: A memory architecture for improved performance and energy efficiency

OS-aware Architecture for Improving Microprocessor Performance and Energy Efficiency

Database-Managed CPU Performance Scaling for Improved Energy Efficiency

Dynamic voltage and frequency scaling (DVFS) is a technique for adjusting the speed and power consumption of processors, allowing performance to be traded for reduced power consumption. Since CPUs are typically the largest consumers of power in modern servers, DVFS can have a significant impact on overall server power consumption. Modern operating systems include DVFS governors, which interact ...

Optical Data Center Networks: Architecture, Performance, and Energy Efficiency

In a data center, servers communicate with each other to store and handle a large amount of data. Thus, the network within a data center affects the performance of the data center; the lack of bandwidth between servers increases the time to obtain the required data from the other servers. The energy consumption is also one of the important problems in a data center. The energy consumed by the d...

A HyperTransport-Enabled Global Memory Model For Improved Memory Efficiency

Modern and emerging data centers are presenting unprecedented demands in terms of cost and energy consumption, far outpacing architectural advances related to economies of scale. Consequently, blade designs exhibit significant cost and power inefficiencies, particularly in the memory system. For example, we observe that modern blades are often overprovisioned to accommodate peak memory demand w...

Characterizing the Opportunity and Feasibility of Reconfigurable Memory Hierarchies for Improved Energy Efficiency

The end of Dennard scaling has made energy-efficiency a critical challenge in the continued increase of computing performance. An important approach to increasing energy-efficiency is hardware customization to specific application needs. In this study we explore the opportunity for memory hierarchy customization for energy-efficiency, exploring reconfigurable memory hierarchies. Using a workloa...